1. Power Reduction with FlipFlop Grouping in Data Driven Clock Gating
T.Naresh and M.Lakshmi Kiran, VITS, Proddatur, Kadapa (Dist)
Pages: 1 – 6
DOI:16.10089.SR.2019.V6I11.285311.190
2. DESIGN AND ANALYSIS OF WIND INATOR
N.MANOJKRISHNA, THANGAVELU ENGINEERING COLLEGE, CHENNAI
Pages: 7 – 14
DOI:16.10089.SR.2019.V6I11.285311.191
3. A STUDY ON CORPORATE SCHOOLS AND PERSONALITY DEVELOPMENT
ARE SRINIVASA REDDY, Osmania University, Hyderabad
Pages: 15 – 26
DOI:16.10089.SR.2019.V6I11.285311.192
4. Implementation of Digital Pixel Sensor Based Parallel Architecture for Automatic Braking System in Automobiles
G. Kavitha and K.S. Md. Musa Mohinuddin, Vaagdevi Institute of Technology & Science (VITS), JNTUA, Proddatur
Pages: 27 – 31
DOI:16.10089.SR.2019.V6I11.285311.193
5. ANDRIOD MOBILE APPLICATION FOR AMBULANCE SERVICE
SASIKALA.K and S.AMUDHA, SRIRAM ENGINEERING COLLEGE
Pages: 32 – 35
DOI:16.10089.SR.2019.V6I11.285311.194
6. HIGH SPEED AND EFFICIENT POWER REDUCTION IN PULSE TRIGGERED FLIPFLOP BASED ON SIGNAL FEED THROUGH SCHEME
T.Ramakrishnan and R.Sornalatha, Shanmuganthan Engineering College , Anna University
Pages: 36 – 40